Currently, a method for forming a semiconductor device comprises the following steps. Firstly, as illustrated in FIGS. 1 and 2, an active region 20 and an isolation region 12 surrounding the active region 20 are formed on a semiconductor substrate 10. Next, as illustrated in FIGS. 3 and 4, a gate stack structure is formed on the active region 20 and extends onto the isolation region 12 (The gate stack structure comprises a gate dielectric layer 22, a gate 24 formed on the gate dielectric layer 22, and a sidewall spacers 26 surrounding the gate dielectric layer 22 and the gate 24. In practice, a cap layer is further formed on the gate for preventing the gate from being damaged during the operation. The cap layer is usually made of silicon nitride. The cap layer is not indicated in the description and drawings of this specification for the convenience of explanation). Next, as illustrated in FIGS. 5 and 6, using the gate stack structure and the isolation region 12 as a mask, the semiconductor substrate 10 of a partial thickness in the active region 20 is removed so as to form a groove 30. Finally, a semiconductor material is grown in the groove 30 for filling into the groove 30, so as to form a source/drain (S/D) region.
However, as illustrated in FIGS. 7 to 9, it is found in practice that a gap 34 is formed at the interface of the S/D region 32 and the isolation region 12; and consequently, as illustrated in FIGS. 10 to 12, when a contact region 36 (e.g., metal silicide layer) is formed subsequently on the S/D region 32, the contact region 36 may easily extend onto the junction region via the gap 34, thereby causing an current leakage.